1. Technical Field
The present invention is directed to data processing systems and more particularly to microprocessors. Still more specifically, the present invention is directed to a thread priority method, apparatus, and computer program product for ensuring processing fairness in simultaneous multi-threading (SMT) microprocessors that concurrently execute multiple threads during each clock cycle.
2. Description of Related Art
A symmetric multiprocessing (SMP) data processing system has multiple processors that are symmetric such that each processor has the same processing speed and latency. An SMP system has one operating system that divides the work into tasks that are distributed evenly among the various processors by dispatching one software thread of work to each processor at a time. Thus, a processor in an SMP system executes only one thread at a time.
A simultaneous multi-threading (SMT) data processing system includes multiple processors that can each concurrently execute more than one thread at a time per processor. An SMT system has the ability to favor one thread over another when both threads are running on the same processor.
Known systems can include a shared processor where the shared processor is shared among the various processes that are being executed by the system. The shared processor can be either an SMP or SMT type of processor.
A shared processor may be part of a logically partitioned system and shared among the various partitions in the system. These systems typically include firmware, also called a hypervisor, that manages and enforces the partitioning and/or sharing of the processor. For example, a hypervisor may receive a request from the system to dispatch a virtual processor to a physical processor. The virtual processor includes a definition of the work to be done by a physical processor as well as various settings and state information that are required to be set within the physical processor in order for the physical processor to execute the work. In known shared processor systems, the hypervisor supervises and manages the sharing of a physical processor among all of the logical partitions.
A single processor, also called a CPU, typically includes one or more different and separate processor cores. The complexity of the processor core continues to increase as more and more execution units are added to the core. These cores need to keep all of their execution units busy in order to maximize the performance of the cores. One method for maximizing performance is the concurrent execution of multiple threads in a single core. In a simultaneous multithreading core, multiple threads are executed concurrently by the single core. Each thread can request a variable number of instructions to be dispatched to a variable number of execution units.
Some systems permit threads to be assigned a priority level. These priorities may include multiple different levels. These priority levels may be used, for example, to determine the number of clock cycles to allocate to each thread during dispatch. For example, a high priority thread might receive eight cycles while a medium priority thread is granted only four cycles for every eight granted to the high priority thread. A low priority thread might receive only one cycle for every eight granted to the high priority thread.
In addition to the priority levels that might be assigned to threads, during each clock cycle threads are assigned a clock cycle priority that is specified to be either “primary” or “secondary” at dispatch and either “primary” or “secondary” at issue for a particular cycle. Thus, a thread will be assigned a clock cycle priority and may also be assigned a priority level. The clock cycle priority is temporary. The clock cycle priority is a temporary assignment that typically lasts for one clock cycle. The clock cycle priority that is assigned to a thread will typically be different during the next clock cycle. The clock cycle priority that is assigned to a thread will typically change in response to the next clock cycle.
The priority level assigned to a thread is persistent. It does not change in response to the next clock cycle. The priority level will remain the same once it is assigned to a thread.
A cycle priority algorithm controls the selection of which thread is selected to be the primary thread and which thread is to be the secondary thread for the particular cycle. The cycle priority assignment of primary or secondary is separate from the priority levels that might be assigned to a thread as discussed above.
During the dispatch stage, the thread that is assigned to be the primary thread will dispatch to the execution units it requests. In addition, the thread that is assigned to be the secondary thread may also dispatch that same cycle if enough unused execution units are still available, after the dispatch of the primary thread, to service the secondary thread.
During the issue stage, the thread that is assigned to be the primary thread is issued during a clock cycle. The thread that is assigned to be the secondary thread will issue if the resources it needs are available.
A problem can arise when the thread that is assigned to be the primary thread during a particular clock cycle cannot be processed, either during dispatch or issue. Typically, in known systems, processing is stalled while the primary thread waits to be processed, e.g. by being dispatched or issued, even though the secondary thread might be able to be processed.
Therefore, a need exists for a thread cycle assignment priority method, apparatus, and computer program product for ensuring processing fairness in simultaneous multi-threading (SMT) microprocessors.